interrupt code

interrupt code
код прерывания - см. interrupt number

Англо-русский толковый словарь терминов и сокращений по ВТ, Интернету и программированию. . 1998-2007.

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  • Interrupt priority level — The interrupt priority level (IPL) is a part of the current system interrupt state, which indicates the interrupt requests that will currently be accepted. The IPL may be indicated in hardware by the registers in a Programmable Interrupt… …   Wikipedia

  • Interrupt handler — An interrupt handler, also known as an interrupt service routine (ISR), is a callback subroutine in an operating system or device driver whose execution is triggered by the reception of an interrupt. Interrupt handlers have a multitude of… …   Wikipedia

  • Interrupt descriptor table — The Interrupt Descriptor Table (IDT) is a data structure used by the x86 architecture to implement an interrupt vector table. The IDT is used by the processor to determine the correct response to interrupts and exceptions.The details in the… …   Wikipedia

  • Interrupt latency — In Realtime Operating Systems, Interrupt latency is the time between the generation of an interrupt by a device and the servicing of the device which generated the interrupt. For many operating systems, devices are serviced as soon as the device… …   Wikipedia

  • Interrupt request — IRQ redirects here. For the country with the ISO 3166 1 country code, see Iraq. The computing phrase interrupt request (or IRQ) is used to refer to either the act of interrupting the bus lines used to signal an interrupt, or the interrupt input… …   Wikipedia

  • Interrupt Service Routine — Ein Interrupthandler (auch Unterbrechungsroutine oder Unterbrechungsbehandlung genannt) ist ein Programmstück, das von einer CPU ausgeführt wird, wenn sie durch einen Softwareinterrupt oder Interrupt Request (Unterbrechungsanforderung) gezwungen… …   Deutsch Wikipedia

  • Interrupt Descriptor Table — L IDT ou Interrupt Descriptor Table est un tableau de données situé dans la mémoire d un ordinateur d architecture x86, et permettant au microprocesseur de gérer les interruptions. Il s agit d un tableau comportant au maximum 256 descripteurs de… …   Wikipédia en Français

  • Condition Code Register — Das Statusregister (auch Zustandsregister, engl. Condition Code Register, CCR) ist ein spezielles Register im Steuerwerk eines Mikroprozessors. Da man diese Bits auch als Flags bezeichnet, wird das Statusregister auch Flagregister genannt. Es… …   Deutsch Wikipedia

  • Non-maskable interrupt — A non maskable interrupt (NMI) is a computer processor interrupt that cannot be ignored by standard interrupt masking techniques in the system. It is typically used to signal attention for non recoverable hardware errors. (Some NMIs may be masked …   Wikipedia

  • Vertical blank interrupt — A vertical blank interrupt (or VBI) is a programming technique used in some systems, notably video games and consoles, to allow program code to be run in the periods when the display hardware is turned off, waiting for the TV to complete its… …   Wikipedia

  • Keyboard interrupt — has two distinct, but related, meanings: *For high level software, it is a special condition (often implemented as an error code or exception), usually generated by the keyboard. The key combination used is often Control C (for cancel ). This is… …   Wikipedia


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